QUIEST PhD & Postdoc Seminar

Presentation by:

Vatsal Bandaru, PhD student in ESE

Talk Title:

Two-Dimensional Conveyor-Mode Shuttling Scheme for Scaling Si/SiGe Spin Qubit Architectures

Description:

Existing two-dimensional spin-qubit matrices are not easily scalable. Individually controllable gate electrodes require immense signal overhead, resulting in a signal fan-out problem. Additionally, short-range exchange interactions are unsuitable for coupling distant qubits, a crucial operation in quantum processors. A promising solution is to establish quantum links by adiabatically shuttling spin qubits between distant registers. Before returning to its original register, a shuttled qubit can interact with a qubit from another register, forming coherent coupling across the quantum processor. Here, we present a shuttling architecture designed to provide omnidirectional shuttling capabilities. The architecture was originally developed to maximize shuttling fidelity against randomly distributed low valley splitting regions. However, we anticipate this architecture will also enable highly scalable spin-based quantum processors.

Zoom: https://upenn.zoom.us/j/92143520041